The ChipInventor EDA Platform is built on the OpenROAD framework, utilizing a suite of well-integrated, professional open-source tools to offer a user-friendly environment for semiconductor development. OpenLane, an automated RTL-to-GDSII flow, is based on OpenROAD and other open-source EDA tools.
ChipInventor not only empowers users to leverage these advanced tools and methodologies, supported by the expertise and experience of our semiconductor design team, but also utilizes a cloud-based infrastructure, eliminating the need for a dedicated IT team.
A responsive and easy-to-learn block interface allows beginners to quickly grasp semiconductor design concepts. Reuse methodology is simplified by dragging and dropping shared blocks from our library, which is supported by a community of thousands of designers.
You can also code in Verilog HDL to create your own blocks (modules) or request assistance using our AI interface.
During the frontend design phase, two simulators are available: a simple one with a schematic interface for behavioral validation and a more advanced one for testbench development and verification.
Before entering the complex and extensive backend phase of the semiconductor design flow, ChipInventor allows you to easily prototype your design by testing its functionality and operation in the field using an FPGA.
Through our interface, simply select the 'Synthesize' menu to find the FPGA option, which launches the RTL, place & route, and packaging tools according to your chosen FPGA type/model.
You can use our DevBoards or directly program the selected FPGA with the generated files. The ChipInventor platform is also developing user-friendly FPGA programming devices, which will be available soon!
If your preferred FPGA is not listed, please contact us.
Once you’ve completed the frontend phase of your design and possibly validated its operation with a quick and simple prototype using our tools, you can take full advantage of ChipInventor’s backend resources.
By clicking on the 'Synthesize' menu, you can initiate the backend flow, launching all the necessary tools to execute critical steps such as RTL Synthesis, STA, Floorplanning, Placement, CTS, Optimizations, Global Routing, LEC, Detailed Routing, GDS Streaming, and more.
At the end of the Synthesize step, you can click to view the most important logs. All execution logs are also accessible through the 'Files' menu. The parameters used by the tools can be configured to optimize performance or resolve issues for a new build.
You can explore your design's layout through an immersive 3D experience using our layout viewer tool, where you'll be able to view layers and masks, zoom, rotate, select specific cells, access cell usage statistics, and much more.
This tool is simple but incredibly cool and educational!
ChipInventor provides access to various semiconductor foundries for both mass production and smaller-scale production, including silicon-proven activities and semiconductor prototypes.
A comprehensive environment for RISC-V semiconductor development.
We have developed our Core IP based on RISC-V architecture, including various modules and semiconductor devices such as serial interfaces (UARTs and SPIs) and a DMA controller for managing external memory. All of these are available on the ChipInventor Platform.
In addition to RISC-V Core and peripheral IPs, ChipInventor provides an IDE (NoCode) for coding in C language and compiling to RISC-V, with the capability to load the final result onto the designed chip!
To offer a comprehensive environment for learning about FPGAs and semiconductor design, we have developed the ChipInventor DevBoard.
This development board allows you to quickly prototype your design, accelerating both operational testing and application environment development.
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